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View exreg_openhw project
E
Linus Matthias Witschen /
exreg_openhw
0
Updated
Jul 06, 2020
0
0
0
0
Updated
Jul 06, 2020
View experiment-manager project
E
Felix Jentzsch /
experiment-manager
0
Updated
Jan 30, 2025
0
0
Updated
Jan 30, 2025
View AuroraFlow project
A
pc2-CI / FPGA /
AuroraFlow
Ready-to-link, packaged Aurora IP on four QSFP28 lanes, providing 100Gb/s throughput
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Updated
Mar 16, 2025
0
0
Updated
Mar 16, 2025